Desenvolvimento de um coprocessador de qualidade de energia padrão classe A baseado em processadores embarcados em FPGA

Abstract

The increasing use of non-linear loads connected to the electric power system and the increase in the insertion of distributed generation, contribute to a possible worsening of the Electric Power Quality (QEE) levels and to the appearance of disturbances, capable of damaging equipment connected to the network. In order to mitigate the economic losses caused by this type of occurrence and meet the requirements for improving QEE by regulatory agencies, the study and development of devices and technologies capable of monitoring and storing QEE indicator parameters is increasing. When evaluating them, it is possible not only to categorize and identify the possible sources of disturbances, but also, according to the number of installed monitors, to obtain an overview of the functioning of the system. Among the technologies available in the market, the Field Programmable Gate Array (FPGA), due to its high reconfigurability and parallelism, has been increasingly used in this type of application. In view of the described scenario, the present work presents the implementation of a system for calculating parameters for QEE indicators, based on the use of parallel processors embedded in FPGA. The algorithms implemented in each processor follow the guidelines described by IEC 61000-4-30, for class A devices. To validate the proposed system, functional simulation tests were performed, using the Intel® ModelSim® software, and more practical tests, with the project recorded and actually running within the FPGA. For this, the DE10-Nano development kit was used, which ships an FPGA belonging to the Intel® manufacturer’s Cyclone V family. In all tests performed, the results showed good accuracy and met the requirements required by the adopted standard.