Implementação e avaliação de métodos de filtragem digital em FPGA para simulação de pulsos em calorimetria de altas energias

Abstract

The significant increase in event rate and, consequently, in the signal pileup conditions expected for Phase II of the Large Hadron Collider imposes new challenges on the readout systems of high-energy physics experiments, demanding digital solutions capable of offering greater numerical robustness, design flexibility, and compatibility with hardware resource constraints. In this context, the central focus of this work is the development of a digital pulse simulator explicitly conceived for the challenging conditions of Phase II, with the aim of reproducing, in a controlled and reproducible manner, signals representative of the high-luminosity regime and thereby enabling a systematic and consistent analysis of digital processing under pileup and noise effects. The signal shaping stage, part of the front-end electronics of the Tile Calorimeter (TileCal) of the ATLAS Experiment, plays a central role in the quality of energy reconstruction and in the mitigation of electronic noise effects. This work also proposes the implementation and comparative evaluation of different digital filtering methods applied to the Calorimeter signal, with a focus on FPGA-realizable architectures suitable for the operational requirements of the high-luminosity scenario. The investigated methods include the conventional IIR filter with quantized coefficients, the lattice method, and a floating-point implementation based on the IEEE representation, each presenting distinct characteristics in terms of hardware complexity, quantization sensitivity, and numerical behavior. The architectures were described at the digital circuit level and implemented on FPGA, being analyzed with respect to stability, quantization-induced error, and logic resource consumption. The results obtained show that the floating-point implementation offers greater precision and numerical robustness, since it eliminates the effects associated with the quantization of coefficients and internal states, although it implies greater complexity and resource utilization. The lattice method proved more tolerant to quantization when compared to the conventional IIR, exhibiting more predictable behavior in terms of stability, at the cost of a moderate increase in logic usage. In turn, the conventional IIR filter stood out for its implementation simplicity and lower resource consumption, making it a viable alternative in scenarios with severe hardware constraints. It is concluded that there is no single solution that is optimal for all applications, and that the choice of filtering method is directly dependent on the requirements of precision, stability, and availability of computational resources; furthermore, the results presented provide relevant support for the design of digital filtering systems applied to the TileCal readout electronics under high-rate conditions.